CDAC CCAT Section C Preparation Strategy: Computer Architecture, Digital Electronics & Microprocessors

Who Needs to Appear for Section C?

Section C is the third paper of C-CAT, scheduled immediately after Section B. You only need to attempt Section C if you selected Category III in your application form. Category III qualifies you for:

• PGCP-ESD: Post Graduate Certificate Programme in Embedded Systems Design
• PGCP-VLSI: Post Graduate Certificate Programme in VLSI Design

8085 Microprocessor Architecture & Programming

The Intel 8085 remains a primary focus of Section C:

• Register Architecture: Accumulator (A), general-purpose registers (B, C, D, E, H, L), Program Counter (PC), Stack Pointer (SP)
• Flag Register: Sign (S), Zero (Z), Auxiliary Carry (AC), Parity (P), Carry (CY)
• Addressing Modes: Immediate, Direct, Register, Register Indirect, and Implied
• Hardware Interrupts: Priority ordering: TRAP (Non-Maskable) → RST 7.5 → RST 6.5 → RST 5.5 → INTR

Digital Electronics: K-Maps, Counters & Logic

• Boolean Simplification: Karnaugh Maps (K-maps) for 3 and 4 variables, identifying don't-care conditions
• Flip-Flops: Truth tables and characteristic equations for SR, JK, D, and T flip-flops
• Counters & Registers: Modulo-N counters, shift registers, ring and Johnson counters
• Combinational Circuits: Multiplexers (MUX), demultiplexers, encoders, and decoders

Computer Architecture & Cache Mapping

• Instruction Pipelining: Pipeline stages, structural, data, and control hazards
• Cache Memory: Direct mapped, fully associative, and set-associative cache architectures
• Memory Systems: Virtual memory translation, hit ratio, and effective memory access time calculations